FPGA+CPU will be the main architecture of future big data-based artificial intelligence

Cool! Audi's production car has driven nearly 900 kilometers from the Silicon Valley to Las Vegas. This is the first few days that Altera announced at its FPGA SoC Developers Conference (ASDF) in Shenzhen that it uses the company's SoC FPGA to implement sensor fusion of various sensors for automated driving.

Many companies that do brain chips or artificial intelligence chips are adopting FPGA+CPU architecture. In a few years, these chips will be ubiquitous in various consumer electronics, and FPGAs will truly be niche. The market is heading towards the mass market, so it seems that Intel's $16.7 billion acquisition is worthwhile, not to mention the absolute advantage it will have in the core cloud market in the future.

Although Intel's acquisition of Altera is still waiting for approval from China and South Korea (both in the US and Europe), it may take another 1-3 months, but the heterogeneous architecture of FPGA+CPU is spreading everywhere, especially some This approach is used in intelligent terminals that require intelligent visual analysis and integration with cloud big data. FPGA+CPU will be the main architecture of future big data-based terminals, changing the overall processor industry landscape.

At the ASDF conference in Shenzhen, many customers demonstrated the latest applications based on FPGASoC, and the FPGA+CPU architecture is rapidly being recognized and adopted by the industry. The following reporters bring you some wonderful cases, and interviewed Chris Balough, Altera's US expert, senior director of embedded processing marketing, his sharp point: "The future users will not care about what technology is used in the SoC, and Just pay attention to the performance of this SoC. Just like now, everyone will not pay attention to what memory technology is used in the CPU, it is a CPU. Perhaps, in a decade, the independent market segment of FPGA will disappear. Altera has been acquired by Intel, and Xilinx and others will find their favorite partners.






Figure: Audi's production car from the Silicon Valley to Las Vegas to achieve autonomous driving of nearly 900 km loop, using Altera's FPGA SoC

At the ASDF conference, Chris Balough, senior director of embedded processing marketing, presented Altera's roadmap for the future: high-end products will use Intel's 10nm process; mid-range will use Intel's 14nm process; and low-end product Cedar will target the large consumer electronics market. The TSMC process is still used. “Cedar products continue to use the TSMC process and we will maintain a long-term relationship with TSMC,” he said. As shown below

Figure: Altera's future high- and low-end roadmap, which involves Intel's 10nm process.

The high-end product feature is that 10 million logical units can be achieved in a single Die. This is based on Intel's special technology. In the future, applications for big data clouds, including routers, have superior performance and low power consumption. And, Altera is confident that it can achieve high yields for big Dies.

What everyone is most interested in is the details of the mid- to low-end Cedar series for the high-volume market in the future, but Chris Balough said that Cedar's details can't be announced yet, "but we are confident that we will lead many applications in consumer electronics by ASSP. Turning to the FPGA SoC, we will provide a cost-effective solution and also have an advantage in power consumption, allowing more products to use the architecture of 64-bit v8 processors," he said.

"Future users won't care about what technology is used in the SoC, but just pay attention to the performance of this SoC. Just like now, people will not pay attention to what memory technology is used in the CPU, it is a CPU." Large FPGAs will continue to exist. However, all of these, including very large logic cell FPGAs and FPGA SOCs, follow a unified development tool that uses a unified development environment, OPenCL, for both FPGA and ARM controllers. “Now OPenCL has not been promoted in undergraduate courses, and I believe it will be popular among college students in the future,” Chris Balough predicts.

Everyone is very worried about the relationship between ARM and Intel in the future. Can Altera continue to support ARM in the future? He explained that Intel is committed to supporting Altera's product roadmap after a huge acquisition of Altera, including support for the ARM core. Although Intel has suggested developing a chip for Xeon processor + FPGA, it is also necessary to develop a related SoC single chip. However, Altera chose ARM because of customer choice. "We will also choose the ARM Cortex A53 core on the upcoming StraTIx 10, all because of the customer's needs, Altera will promote the adoption of 64-bit v8 architecture ARM core + FPGA." He said.

With the top OEMs such as Apple, Samsung and Huawei designing their own mobile phone chips, the market share of general-purpose ASSP products will be reduced. This is also the reason why TI's hugely successful OMAP products disappeared instantly. Therefore, with the continuous improvement of semiconductor technology, chip design investment is huge, ASSP and ASIC need huge shipments to support, and now there is less and less market for such huge shipments.

Of course, we see more emerging consumer electronics markets besides mobile phones are adopting FPGA SoC solutions, such as the current hot drones, "a famous Chinese drone company is using our FPGA SoC solution to replace the ASSP solution." Chris Balough revealed. In addition, the FPGA SoC is used in place of the ASSP in the autopilot system of the aforementioned Audi. “There are some Chinese customers who are designing Bitcoin excavators with FPGAs.”

This developer conference invited 400-500 partners to participate, which is the first time Altera has focused on building the FPGA SoC ecosystem.

SoC FPGA will be a subversion of the existing FPGA world, which will change the customer's decision. It is also a big challenge for engineers. We will build an ecological chain from hardware to software to help customers meet the moment of this great change. . He finally said.

High-speed electric motor with FPGA

At the ASDF conference, Altera demonstrated many Cyclone V SoC-based applications, and this multi-axis motion and precise positioning application impressed the audience.


Figure: Cyclone V SoC-based high speed motor solution being adopted by many electric vehicle manufacturers

The above picture is a motor control solution that is being adopted by many electric vehicle manufacturers. Why use Cyclone VSoC instead of traditional MCU or DSP? The person in charge of the booth explained that FPGA control can achieve very high performance. For example, the usual DSP and MCU can only achieve 8K or 16K speed, and the FPGA can achieve 200K-300K. This just meets the needs of many electric vehicles at present. There are three reasons: one is that some IGBT devices in electric vehicles are turning to silicon carbide. The speed requirement of silicon carbide is very high, even more than 200K. The cyclcone V SoC just meets this demand. The second is that the electric vehicle is turned from a single axis to a multi-axis, and multi-axis linkage is required, so the traditional MCU and DSP can not meet the requirements, and the FPGA is required to complete; in addition, the drive-integrated solution also has such a demand. Finally, because the FPGA solution is very efficient, it meets the requirements of green energy in various countries.

“Customers are still sensitive to device costs, but as brand customers move toward mid-to-high end, they also offer differentiated capabilities, and FPGA solutions cater to their needs,” he analyzes.

FPGA SoC supports precision positioning and multi-axis motion robots




Figure: This is an industrial manipulator based on the cyclcone V SoC, which supports multiple axes and can be positioned with great precision.

This is an industrial robot based on the cyclcone VSoC, which supports multiple axes and can be positioned with great precision. It supports Industrial Ethernet, uses a Chinese checkers to do Demo, demonstrates its precise positioning, especially the design of the one jaw is very interesting, both the part of the groove can be grasped, and the protruding part can be grasped. Its very precise positioning. In addition, its circular motion and acceleration and deceleration movements are very precise. Some customers are currently developing robotic products based on the cyclcone VSoC solution.


Fine particle heterogeneous calculation for gesture control



Figure: This cyclcone V SoC-based fine particle heterogeneous computing model can be used in 3D mouse, gesture control and other scenarios in the future.

This is a fine particle heterogeneous computing DEMO based on cyclcone VSoC - graphics acceleration algorithm. The SoC has dual cores of cyclcone and ARM Cortex A9. It can be arbitrarily fine-tuned by FPGA+CPU. Altera calls it fine-grained heterogeneous computing, in which FPGA plays the role of graphics acceleration: put the functions originally processed in the CPU into the FPGA. Running in the middle, that is, doing the original software to do to the FPGA, you can flexibly do fine-tuning, according to the needs of customer applications to the lowest power consumption, the fastest. In this way, customers can do their own secondary development. The application scenarios of this DEMO include 3D mouse, gesture control and so on. It uses the OpneCL tool and can compile both the FPGA and the CPU.

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